feat(pcb): relays layout

This commit is contained in:
2026-04-16 13:51:20 +08:00
parent 5206e98118
commit 9966fada8e
19 changed files with 315533 additions and 285785 deletions
Submodule hardware/pcb/.history added at b3c40bcfbd
File diff suppressed because it is too large Load Diff
+7 -1
View File
@@ -4,7 +4,9 @@
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"hidden_nets": [
"GND"
],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
@@ -15,6 +17,7 @@
"vias": 1.0,
"zones": 0.6
},
"prototype_zone_fills": false,
"selection_filter": {
"dimensions": true,
"footprints": true,
@@ -107,6 +110,7 @@
"filter_text": "",
"group_by_constraint": false,
"group_by_netclass": false,
"show_time_domain_details": false,
"show_unconnected_nets": false,
"show_zero_pad_nets": false,
"sort_ascending": true,
@@ -117,6 +121,7 @@
"files": []
},
"schematic": {
"hierarchy_collapsed": [],
"selection_filter": {
"graphics": true,
"images": true,
@@ -124,6 +129,7 @@
"lockedItems": false,
"otherItems": true,
"pins": true,
"ruleAreas": true,
"symbols": true,
"text": true,
"wires": true
+57 -8
View File
@@ -3,6 +3,8 @@
"3dviewports": [],
"design_settings": {
"defaults": {
"apply_defaults_to_fp_barcodes": false,
"apply_defaults_to_fp_dimensions": false,
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
@@ -77,6 +79,7 @@
"extra_footprint": "warning",
"footprint": "error",
"footprint_filters_mismatch": "ignore",
"footprint_symbol_field_mismatch": "warning",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
@@ -94,6 +97,7 @@
"mirrored_text_on_front_layer": "warning",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"missing_tuning_profile": "warning",
"net_conflict": "warning",
"nonmirrored_text_on_back_layer": "warning",
"npth_inside_courtyard": "ignore",
@@ -107,14 +111,18 @@
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_on_edge_cuts": "error",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_angle": "error",
"track_dangling": "warning",
"track_not_centered_on_via": "ignore",
"track_on_post_machined_layer": "error",
"track_segment_length": "error",
"track_width": "error",
"tracks_crossing": "error",
"tuning_profile_track_geometries": "ignore",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
@@ -227,17 +235,28 @@
"zones_allow_external_fillets": false
},
"ipc2581": {
"bom_rev": "",
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
"mpn": "",
"sch_revision": "1.0.0"
},
"layer_pairs": [],
"layer_presets": [],
"viewports": []
},
"boards": [],
"component_class_settings": {
"assignments": [],
"meta": {
"version": 0
},
"sheet_component_classes": {
"enabled": false
}
},
"cvpcb": {
"equivalence_files": []
},
@@ -427,11 +446,14 @@
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"field_name_whitespace": "warning",
"footprint_filter": "ignore",
"footprint_link_issues": "warning",
"four_way_junction": "ignore",
"global_label_dangling": "warning",
"ground_pin_not_ground": "warning",
"hier_label_mismatch": "error",
"isolated_pin_label": "warning",
"label_dangling": "error",
"label_multiple_wires": "warning",
"lib_symbol_issues": "warning",
@@ -454,6 +476,7 @@
"similar_power": "warning",
"simulation_model_issue": "ignore",
"single_global_label": "ignore",
"stacked_pin_name": "warning",
"unannotated": "error",
"unconnected_wire_endpoint": "warning",
"undefined_netclass": "error",
@@ -492,6 +515,7 @@
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.254,
"tuning_profile": "",
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
@@ -501,25 +525,28 @@
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 8.0
"track_width": 8.0,
"tuning_profile": ""
},
{
"name": "Power Low",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 2.54
"track_width": 2.54,
"tuning_profile": ""
},
{
"name": "Power Out",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 1,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 6.0
"track_width": 6.0,
"tuning_profile": ""
}
],
"meta": {
"version": 4
"version": 5
},
"net_colors": null,
"netclass_assignments": null,
@@ -566,6 +593,10 @@
},
"schematic": {
"annotate_start_num": 0,
"annotation": {
"method": 0,
"sort_order": 0
},
"bom_export_filename": "${PROJECTNAME}.csv",
"bom_fmt_presets": [],
"bom_fmt_settings": {
@@ -637,6 +668,7 @@
"sort_asc": true,
"sort_field": "位号"
},
"bus_aliases": {},
"connection_grid_size": 50.0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
@@ -644,6 +676,7 @@
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"hop_over_size_choice": 0,
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
@@ -667,6 +700,7 @@
"net_format_name": "",
"page_layout_descr_file": "",
"plot_directory": "",
"reuse_designators": true,
"space_save_all_events": true,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
@@ -675,13 +709,28 @@
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
"subpart_id_separator": 0,
"top_level_sheets": [
{
"filename": "HeliosDAONE.kicad_sch",
"name": "HeliosDAONE",
"uuid": "ef4a6f87-87d3-400e-b11f-0c7519b83474"
}
],
"used_designators": "NT1,J4",
"variants": []
},
"sheets": [
[
"ef4a6f87-87d3-400e-b11f-0c7519b83474",
"Root"
"HeliosDAONE"
]
],
"text_variables": {}
"text_variables": {},
"tuning_profiles": {
"meta": {
"version": 0
},
"tuning_profiles_impedance_geometric": []
}
}
File diff suppressed because it is too large Load Diff
+3 -2
View File
@@ -1,4 +1,5 @@
(design_block_lib_table
(version 7)
(lib (name "converted.3dmodels")(type "KiCad")(uri "${KIPRJMOD}/library/converted.3dmodels")(options "")(descr ""))
(version 7)
(lib (name "converted.3dmodels") (type "KiCad") (uri "${KIPRJMOD}/library/converted.3dmodels") (options "") (descr ""))
(lib (name "RayineComponents.3dmodels") (type "KiCad") (uri "${KIPRJMOD}/library/RayineComponents.3dmodels") (options "") (descr ""))
)
File diff suppressed because it is too large Load Diff
+3 -2
View File
@@ -1,4 +1,5 @@
(fp_lib_table
(version 7)
(lib (name "converted")(type "KiCad")(uri "${KIPRJMOD}/library/converted.pretty")(options "")(descr ""))
(version 7)
(lib (name "converted") (type "KiCad") (uri "${KIPRJMOD}/library/converted.pretty") (options "") (descr ""))
(lib (name "RayineComponents") (type "KiCad") (uri "${KIPRJMOD}/library/RayineComponents.pretty") (options "") (descr ""))
)
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+3 -2
View File
@@ -1,4 +1,5 @@
(sym_lib_table
(version 7)
(lib (name "converted")(type "KiCad")(uri "${KIPRJMOD}/library/converted.kicad_sym")(options "")(descr ""))
(version 7)
(lib (name "converted") (type "KiCad") (uri "${KIPRJMOD}/library/converted.kicad_sym") (options "") (descr ""))
(lib (name "RayineComponents") (type "KiCad") (uri "${KIPRJMOD}/library/RayineComponents.kicad_sym") (options "") (descr ""))
)