chore: move mcs51 lib to lib
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lib/mcs51/stc89.h
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179
lib/mcs51/stc89.h
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/*-------------------------------------------------------------------------
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stc89c.h - Register Declarations for STC89Cxx Series
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Based on stc12.h
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Copyright (c) 2012, intron@intron.ac
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Copyright (c) 2020, flameeyes@flameeyes.com
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This library is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this library; see the file COPYING. If not, write to the
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Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
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MA 02110-1301, USA.
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As a special exception, if you link this library with other files,
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some of which are compiled with SDCC, to produce an executable,
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this library does not by itself cause the resulting executable to
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be covered by the GNU General Public License. This exception does
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not however invalidate any other reasons why the executable file
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might be covered by the GNU General Public License.
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-------------------------------------------------------------------------*/
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/*
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Brief:
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STC89Cxx/STC89LExx series are 8051-compatible MCU's. The "official"
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websites are http://www.stcmcu.com/ (In Chinese Han only) and
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http://www.stcmicro.com/ (in English), and datasheets in Chinese Han and
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English can be downloaded there.
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Reference:
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1.
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1. The "official" C header file (written for another C51 compiler):
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http://www.stcmcu.com/datasheet/stc/STC-AD-PDF/STC_NEW_8051.H
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2. Datasheets for STC89(C/LE)xx series:
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English:
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http://www.stcmicro.com/datasheet/STC89C51RC-en.pdf
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*/
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#ifndef _STC89_H_
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#define _STC89_H_
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#include <8051.h>
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#include <compiler.h>
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#ifdef REG8051_H
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#undef REG8051_H
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#endif
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/*
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* Auxiliary Register
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* Bit Mapping: - - - - - - EXTRAM ALEOFF
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* Reset Value: xxxx,xx00
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*/
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SFR(AUXR, 0x8E);
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/*
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* Auxiliary Register 1
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* Bit Mapping: - - - - - - GF2 - - DPS
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* Reset Value: 0xxx,0xx0
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*/
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SFR(AUXR1, 0xA2);
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/* Slave Address for Serial Communication
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* Reset Value: 0000,0000
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*/
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SFR(SADDR, 0xA9);
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/*
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* Higher bits for Interrupt Priority
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* Bit Mapping: PX3H PX2H PT2H PSH PT1H PX1H PT0H PX0H
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* Reset Value: 0000,0000
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*/
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SFR(IPH, 0xB7);
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/* Slave Address Mask for Serial Communication
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* Reset Value: 0000,0000
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*/
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SFR(SADEN, 0xB9);
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/* Auxiliary Input Control
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* Bit Mapping: PX3 EX3 IE3 IT3 PX2 EX2 HE2 IT2
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* Reset Value: 0000,0000
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*/
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SFR(XICON, 0xC0);
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/* Timer/Counter 2 registers are compatible with AT89x52 */
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/* Timer/Counter 2 Control
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* Bit Mapping: TF2 EXF2 RCLK TCLK EXEN2 TR2 C/!T2 CP/!RL2
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* Reset Value: 0000,0000
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*/
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SFR(T2CON, 0xC8);
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/* Timer/Counter 2 Mode
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* Bit Mapping: - - - - - - T2OE DCEN
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* Reset Value: xxxx,xx00
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*/
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SFR(T2MOD, 0xC9H);
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/* Timer/Counter 2 Reload/Capture Low Byte
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* Reset Value: 0000,0000
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*/
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SFR(RCAP2L, 0xCA);
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/* Timer/Counter 2 Reload/Capture High Byte
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* Reset Value: 0000,0000
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*/
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SFR(RCAP2L, 0xCB);
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/* Timer/Counter 2 Low Byte
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* Reset Value: 0000,0000
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*/
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SFR(RCAP2L, 0xCC);
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/* Timer/Counter 2 High Byte
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* Reset Value: 0000,0000
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*/
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SFR(RCAP2L, 0xCD);
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/*
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* Watchdog Timer Control Register
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* Bit Mapping: - - EN_WDT CLR_WDT IDLE_WDT PS2 PS1 PS0
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* Reset Value: xx00,0000
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*/
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SFR(WDT_CONTR, 0xC1);
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/* In-Application-Programming Data Register
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* Reset Value: 1111,1111
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*/
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SFR(IAP_DATA, 0xE2);
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/* In-Application-Programming Address Registers
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* Reset Values: 0000, 0000
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* 0000, 0000
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*/
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SFR(IAP_ADDRH, 0xE3); /* Higher 8 bits */
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SFR(IAP_ADDRL, 0xE4); /* Lower 8 bits */
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/*
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* In-Application-Programming Address Registers
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* Bit Mapping: - - - - - MS2 MS1 MS0
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* Reset Value: xxxx,x000
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*/
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SFR(IAP_CMD, 0xE5);
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/* In-Application-Programming Trigger Registers
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* Reset Value: xxxx,xxxx
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*/
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SFR(IAP_TRIG, 0xE6);
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/*
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* In-Application-Programming Control Register
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* Bit Mapping: ISPEN SWBS SWRST - - WT2 WT1 WT0
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* Reset Value: 000x,x000
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*/
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SFR(IAP_CONTR, 0xE7);
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/*
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* One Extended GPIO Port: P4
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* - For PLCC-44 and LQFP-44 packages, only lower 4 bits of P4 are available.
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*/
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SFR(P4, 0xE8);
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SBIT(P4_0, 0xC0, 0);
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SBIT(P4_1, 0xC0, 1);
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SBIT(P4_2, 0xC0, 2);
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SBIT(P4_3, 0xC0, 3);
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#endif /* _STC89_H_ */
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