59 lines
2.4 KiB
C
59 lines
2.4 KiB
C
/*-------------------------------------------------------------------------
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msm8xc154s.h - Register Declarations for the Oki MSM80C154S and
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MSM83C154S
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Copyright (C) 2005, Matthias Arndt / marndt@asmsoftware.de
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This library is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this library; see the file COPYING. If not, write to the
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Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
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MA 02110-1301, USA.
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As a special exception, if you link this library with other files,
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some of which are compiled with SDCC, to produce an executable,
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this library does not by itself cause the resulting executable to
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be covered by the GNU General Public License. This exception does
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not however invalidate any other reasons why the executable file
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might be covered by the GNU General Public License.
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-------------------------------------------------------------------------*/
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#ifndef MSM8xC154S_H
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#define MSM8xC154S_H
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#include <8052.h> /* load definitions for the 8052 core */
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#ifdef REG8052_H
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#undef REG8052_H
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#endif
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/* byte SFRs */
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__sfr __at (0xf8) IOCON; /* IOCON register */
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/* bit locations */
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__sbit __at (0xf8) ALF; /* floating status on power down control */
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__sbit __at (0xf9) P1HZ; /* P1 high impedance input control */
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__sbit __at (0xfa) P2HZ; /* P2 high impedance input control */
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__sbit __at (0xfb) P3HZ; /* P3 high impedance input control */
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__sbit __at (0xfc) IZC; /* 10kO pull-up resistor control */
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__sbit __at (0xfd) SERR; /* Serial port reception flag */
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__sbit __at (0xfe) T32; /* interconnect T0 and T1 to 32bit timer/counter */
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/* Bits in IP (0xb8) */
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__sbit __at (0xbf) PCT; /* Priority interrupt circuit control bit */
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/* Bits in PCON (0x87) */
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#define RPD 0x20 /* Bit used to specify cancellation of CPU power down mode */
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#define HPD 0x40 /* The hard power down setting mode is enabled when this bit is set to "1". */
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#endif
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